Digital camera with changeable processing depending on display device

ABSTRACT

A digital camera with interchangeable displays having a built-in display device and an image output terminal for transmitting image signals to an external monitor device, characterised in that it has a plurality of means for processing the image, outputting a suitable image to the built-in display device or to the external monitor device by switching between the means for processing the image on the basis of prescribed signals.

BACKGROUND TO THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a device for interchangingdisplays in a digital camera, and more precisely to a device forinterchanging displays in a digital camera whereby the method of displaychanges between displaying the image with a built-in liquid crystaldevice and displaying it on a monitor device by linking the camera tothe monitor device with the help of a video cable, and between whenfocusing and not focusing.

[0003] 2. Description of the Related Art

[0004] Some digital cameras, in addition to having a small liquidcrystal or other display device, have an image output terminal wherebyimage signals are fed to an external monitor device. With digitalcameras, insofar as the image is being viewed on the liquid crystaldisplay device, the screen is relatively small and it does not detractvery much from the quality of the image even if it is displayed using animage signal which has been processed so as to cull a large number ofpixels. However, this is not so if an image signal of this sort is usedto display the image on a monitor device with a large screen.

[0005] The situation is that especially where the image is processed bymeans of a microprocessor, it is possible to shorten the time requiredfor processing in direct proportion to the number of pixels that areculled.

[0006] Conventional digital cameras have made use of image signals fromthe same image processing circuit irrespective of whether the image isviewed on the liquid crystal display device built into the camera or onan external monitor device. Consequently, with a conventional digitalcamera where the image processing circuit of the camera is one whichculls large numbers of pixels during image processing, the image hasbeen rough and the quality defective when viewed on an external monitordevice using a video cable. Conversely, if the image processing circuitof the camera does not cull large numbers of pixels, it takes a longtime to process the image, so that there is a long interval betweenframes in the quasi-dynamic image displayed on the liquid crystaldisplay device of the digital camera.

[0007] Moreover, if the same tone is employed when displaying the imagesignal on a liquid crystal display device as when displaying it on anexternal monitor, it can become difficult to see the liquid displaydevice, particularly when photographing in bright light outdoors.

[0008] Furthermore, when adjusting the focus manually, the user does sowhile viewing the image displayed on the liquid crystal display. Thiscan be problematic in that the extreme smallness of the display makes itdifficult to decide whether or not it is in focus.

SUMMARY OF THE INVENTION

[0009] With a view to solving the abovementioned problems, it is a firstobject of the present invention to provide a digital camera withinterchangeable displays wherein large numbers of pixels are culled inprocessing the image signal which is output for display on the displaydevice which is built into the camera, while a smaller number are culledin processing the image signal which is output for display on anexternal monitor device using a video cable.

[0010] Moreover, it is a second object of the present invention toprovide a digital camera with interchangeable displays wherein contrastis emphasised in processing the image signal which is output for displayon the display device which is built into the camera, while reproductionof tone is emphasised in processing the image signal which is output fordisplay on an external monitor device using a video cable.

[0011] Furthermore, it is a third object of the present invention toprovide a digital camera with interchangeable displays wherein duringadjustment of the focus an image signal is output which is processed insuch a manner that part of the image is enlarged.

[0012] In order to attain the abovementioned objects, the presentinvention is a digital camera having a built-in display device and animage output terminal which transmits image signals to an externalmonitor device, and comprising means for changing the position of thefocus, means for detecting the position of the focus, means fordetecting whether or not the video cable has been inserted, means forchanging the method of processing employed in the means for processingthe image, and a method of feeding the output of the means forprocessing the image to the image output terminal.

[0013] The above configuration permits the realisation of a digitalcamera with interchangeable displays wherein large numbers of pixels areculled and the image signal is processed at high speed when it is beingoutput for display on the display device which is built into the camera,while a smaller number of pixels are culled with higher image qualitywhen processing the image signal which is output for display on anexternal monitor device using a video cable.

[0014] Moreover, it permits the realisation of a digital camera withinterchangeable displays wherein contrast is emphasised in processingthe image signal which is output for display on the display device whichis built into the camera, while reproduction of tone is emphasised inprocessing the image signal which is output for display on an externalmonitor device using a video cable.

[0015] Furthermore, it permits the realisation of a digital camera withinterchangeable displays wherein during adjustment of the focus an imagesignal is output which is processed in such a manner that part of theimage is enlarged.

BRIEF DESCRIPTION OF THE DRAWINGS

[0016]FIG. 1 a block diagram illustrating the first embodiment of thedigital camera with interchangeable displays to which the presentinvention pertains;

[0017]FIG. 2 is a diagram illustrating part of the colour filter whichis fitted to the surface of the CCD;

[0018]FIG. 3 is a block diagram illustrating the first image processingcircuit 10 depicted in FIG. 1;

[0019]FIG. 4 is a block diagram illustrating the second image processingcircuit 12 depicted in FIG. 1;

[0020]FIG. 5 is a block diagram illustrating the progressive processingcircuit 8 depicted in FIG. 1;

[0021]FIG. 6 is a block diagram illustrating the second embodiment ofthe digital camera with interchangeable displays to which the presentinvention pertains;

[0022]FIG. 7 is a block diagram illustrating the third image processingcircuit 80 depicted in FIG. 6;

[0023]FIG. 8 is a block diagram illustrating the fourth image processingcircuit 82 depicted in FIG. 6;

[0024]FIG. 9 is a diagram illustrating the input/output relationship ofthe gamma correction circuit 86;

[0025]FIG. 10 is a diagram illustrating the input/output relationship ofthe gamma correction circuit 90;

[0026]FIG. 11 is a block diagram illustrating the third embodiment ofthe digital camera with interchangeable displays to which the presentinvention pertains;

[0027]FIG. 12 is a block diagram illustrating the fifth image processingcircuit 90 depicted in FIG. 11;

[0028]FIG. 13 is a block diagram illustrating the sixth image processingcircuit 92 depicted in FIG. 11;

[0029]FIG. 14 is a block diagram illustrating the colour data area whichis read by the image centre read circuit 74 depicted in FIG. 13;

[0030]FIG. 15 is a block diagram illustrating the fourth embodiment ofthe digital camera with interchangeable displays to which the presentinvention pertains;

[0031]FIG. 16 is a waveform diagram illustrating output signals from thecircuit for generating horizontal timing 78 and the circuit forgenerating vertical timing 79; and

[0032]FIG. 17 is (a) colour data in the memory, and (b) a conceptualdrawing of image signals displayed on the display device which is builtinto the camera, both in the fourth embodiment of the digital camerawith interchangeable displays to which the present invention pertains.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0033] (Embodiment 1)

[0034]FIG. 1 is a block diagram illustrating the first embodiment of thedigital camera with interchangeable displays to which the presentinvention pertains, and depicts a device for changing the display modeby inserting or removing the video cable. In the device to which thepresent invention pertains, the image is displayed with rough picturequality at a higher number of frames per second (eg 6 frames/sec) on thedisplay device of the camera itself, but at a lower number of frames persecond (eg 4 frames/sec) and finer picture quality when the video cableis inserted and the image displayed on a television or other externalmonitor device 28.

[0035] In FIG. 1, means for capturing an image is composed of a lens 2and a charge-coupled device (CCD) 4. The CCD 4 has on its surface forthe purpose of colouration, for instance, a colour filter of the typeillustrated in FIG. 2. 6 is an A/D converter, 8 is a progressiveprocessing circuit which processes image signals without culling ofpixel signals, 10 is a first processing circuit which culls largenumbers of pixel signals, 12 is a second processing circuit which cullsfewer pixel signals, 14 is a detector which detects whether the videocable has been inserted or not, 16 is the shutter button of the digitalcamera, 18 is a flip-flop, 20 is a CCD drive circuit, 22 is a D/Aconverter, 24 is a bit map memory which memorises the image which hasbeen captured, 26 is the display device which is located on the body ofthe camera and is preferably a liquid crystal display, 28 is atelevision or other display device, 30 is the vide cable which connectsthe display device 28 to the digital camera, S1 a and S1 b areinterlocking switches which change in accordance with the Q output ofthe flip-flop 18, S2 a and S2 b are interlocking switches which changein accordance with the output from the detector 14 for detecting whetherthe video cable has been inserted or not, S3 is a third switch whichchanges in accordance with the Q output of the flip-flop 18, and S4 is afourth switch which change in accordance with whether the video cable 30from the external monitor device 28 has been inserted or not, andconstitutes the image output terminal.

[0036] When the shutter button 16 is not being depressed, a low-levelsignal is output from the Q output of the flip-flop 18, as a result ofwhich the CCD drive circuit 20 counts the adjoining pixels of the CCD 4.For example, it counts the magenta (Mg) and yellow (Ye) pixels above andbelow, and the green (G) and cyan (C) pixels above and below, outputtingsimplified image data in PD Mix mode, so to speak. The low-level signalfrom the Q output also causes the first interlocking switches S1 a andS1 b to be set in the positions denoted by the unbroken lines, whilealso causing the switch S3 to assume the position denoted by theunbroken line.

[0037] In a state where the shutter button is not being depressed,action differs between when the video cable 30 is removed and the switchS4 is in the position denoted by the unbroken line (main body displaymode), and when the video cable 30 is inserted and the switch S4 is inthe position denoted by the broken line (monitor display mode).

[0038] In main body display mode, the video cable 30 is removed, and thedetector 14 for detecting whether the video cable has been inserted ornot detects this state. When it does so, it outputs a first signal (eg ahigh-level signal), and the interlocking switches S2 a and S2 b are setin the positions denoted by the unbroken lines. Consequently, the PDMixmode image signal obtained from the CCD 4 is fed by way of the A/Dconverter 6, the first processing circuit 10 and the D/A converter 22 tothe liquid crystal display 26 on the main body of the camera. As will beexplained later, the first processing circuit 10 culls large numbers ofpixel signals while processing the image, and so it is able to constructthe image very quickly (eg at 6 frames/sec).

[0039] In monitor display mode, the video cable 30 is inserted, and thedetector 14 for detecting whether the video cable has been inserted ornot detects this state. When it does so, it outputs a second signal (ega low-level signal), and the interlocking switches S2 a and S2 b are setin the positions denoted by the broken lines. Consequently, the PDMixmode image signal obtained from the CCD 4 is fed by way of the A/Dconverter 6, the second processing circuit 12 and the D/A converter 22to the monitor display device 28. As will be explained later, the secondprocessing circuit 12 culls a relatively small number of pixel signalswhile processing the image, and so while it constructs the image slowly(eg at 4 frames/sec), the completed image is sharper than in the case ofmain body display mode.

[0040] If the shutter button 16 is depressed, a set signal is input intothe S input of the flip-flop 18, and a high-level signal is output fromthe Q output of the same, as a result of which the CCD drive circuit 20is set in progressive mode wherein it outputs all the pixels of the CCD4 without modification. The high-level signal from the Q output alsocauses the first interlocking switches S1 a and S1 b to be set in thepositions denoted by the broken lines, as also the switch 3. This meansthat the progressive mode video Signal obtained from the CCD 4 is fed byway of the A/D converter 6, the progressive processing circuit 8 and theD/A converter 22 to the memory 24. In the progressive processing circuit8, one frame of image data is processed progressively and fed as bit mapdata to the memory 24. When the progressive processing of one frame ofimage data is complete and all the pixel signals are memorised in thebit map memory 24, the progressive processing circuit 8 inputs a re-setsignal into the R input of the flip-flop 18, and a low-level signal isoutput from the Q output of the same. As a result of this low-levelsignal, the CCD drive circuit 20 is set again in PDMix mode. Also as aresult of the low-level signal from the Q output, the first interlockingswitches S1 a and S1 b are set in the positions denoted by the unbrokenlines, and the switch S3 is returned to the position denoted in the samemanner.

[0041] If the video cable has been removed and the switch S4 is in theposition denoted by the unbroken line, namely if the device is in mainbody display mode, as has been explained above, frames are constructedquickly by the first processing circuit 10 and displayed on the liquidcrystal display device 26 on the main body of the camera. Meanwhile, Ifthe video cable has been inserted and the switch S4 is in the positiondenoted by the broken line, namely if the device is in monitor displaymode, as has been explained above, frames are constructed slowly by thesecond processing circuit 12 and displayed on the monitor display device28. Processing is slower, but the completed image is sharper than in thecase of main body display mode.

[0042]FIG. 3 is a block diagram illustrating the first image processingcircuit 10 depicted in FIG. 1. In the drawing, 32 is a horizontalsampling circuit, 34 is a gamma correction circuit, 36 is anover-sampling circuit, 38 is a one pixel delay circuit, 40 is a onehorizontal period delay circuit, 42 is a one pixel delay circuit, 44 isa subtracter, 46 is an adder, 48 is a subtracter, 50, 52 and 54 are eachsample-hold circuits, 56 is an RGB matrix, and 58 is a YUV matrix.

[0043] The horizontal sampling circuit 32 samples the brightness signalY with a 3 MHz clock. If pixel signals are being fed at 12 MHz, thismeans that one pixel in four is sampled, If there are 640 pixels in onehorizontal period, 160 pixels are sampled. The degree of culling isdetermined by this horizontal sampling circuit 32. Here it is a relativelarge cull. Culled brightness signals pass through the gamma correctiondevice 34 and are converted to 6 MHz in the over-sampling circuit 36.The same rate of Y output is obtained as with the second processingcircuit illustrated in FIG. 4 and described below.

[0044] The sample-hold circuits 50, 52 and 54 sample and hold R-Y, Y andB-Y signals respectively with 5 MHz clocks. The R-Y, Y and B-Y signalsare sampled and held, while R, G and B signals are constructed by theRGB matrix 56, together with U and V signals by the YUV matrix.

[0045] Compared with the second processing circuit 12 illustrated inFIG. 4 and described below, the first processing circuit 10 illustratedin FIG. 3 has a smaller number of gamma-corrected Y signals, while gammacorrection of the LPF circuit in the circuit which processes coloursignals and the R, G and B colour signals is omitted. This allowshigh-speed processing, and images are generated at 6 frames/sec, forinstance.

[0046] The first processing circuit illustrated in FIG. 3 is the circuitwhich operates during main body display mode, and generates six framesper second. As a result, it is possible to speed up the renewal rate ofthe liquid crystal display device 26 on the main body.

[0047]FIG. 4 is a block diagram illustrating the second image processingcircuit 12 depicted in FIG. 1. It differs from the first processingcircuit illustrated in FIG. 3 in that the sampling frequency ofhorizontal sampling circuit 32′ is 6 MHz, while it also has a low-passfilter 60, a pedestal generator 62, an adder 64, and gamma correctioncircuits 66, 68 and 70. In all other respects it is configured in thesame manner as depicted in FIG. 3, and a description will be omitted.

[0048] The horizontal sampling circuit 32′ samples the brightness signalY with a 6 MHz clock. The degree of culling is smaller than in the caseof the horizontal sampling circuit 32, and images are generated at therate of four frames per second. Since the degree of culling is small, itis possible to construct a fine-grained image even on a large monitorscreen.

[0049] The provision of a low-pass filter 60 on the circuit whichprocesses colour makes it possible to suppress untrue colours at pointswhere the brightness changes.

[0050] The provision of a pedestal generator 62 and the addition of apedestal signal to the brightness signal allows the construction ofimages with good reproduction of tone in dark areas.

[0051]FIG. 5 is a block diagram illustrating a progressive processingcircuit 8. This differs from the second processing circuit 12illustrated in FIG. 4 in that the circuit which processes the brightnesssignal has a low-pass filter 72 in place of the horizontal samplingcircuit 32′, while the circuit which processes colour has in addition ahorizontal period delay circuit 74 and an adder 76. Moreover, the delaycircuit provided on the circuit which processes the B-Y signal is notthe one horizontal period delay circuit 40 but the two horizontalperiods delay circuit 40′, and the sampling frequency of the sample-holdcircuits 50′, 52′ and 54′ is 3 MHz.

[0052] Because there is no horizontal sampling circuit to samplebrightness signals on the progressive circuit 8, all the pixel signalsare sampled, and it is therefore possible to feed image signals of thehighest picture quality to the recorded image.

[0053] (Embodiment 2)

[0054]FIG. 6 is a block diagram illustrating the second embodiment ofthe digital camera with interchangeable displays to which the presentinvention pertains. In the device to which the present inventionpertains, a third processing circuit 80 makes it possible to display animage which has been processed with emphasis on contrast in such amanner as to be easy to view outdoors on the display device 26 of thecamera itself, while a fourth processing circuit 82 makes it possible todisplay an image which has been processed with emphasis on reproductionof tone in such a manner as to be easy to view when the video cable isinserted and the image is displayed on a television or other externalmonitor device 28.

[0055] In FIG. 6, 80 is the third processing circuit whereby the imageis processed with emphasis on contrast, and 82 is the fourth processingcircuit whereby it is processed with emphasis on reproduction of tone.

[0056] When the shutter button 16 is not being depressed, a low-levelsignal is output from the Q output of the flip-flop 18, as a result ofwhich the first interlocking switches S1 a and S1 b are set in thepositions denoted by the unbroken lines, while the switch S3 alsoassumes the position denoted by the unbroken line.

[0057] In a state where the shutter button is not being depressed,action differs between when the video cable 30 is removed and the switchS4 is in the position denoted by the unbroken line (main body displaymode), and when the video cable 30 is inserted and the switch S4 is inthe position denoted by the broken line (monitor display mode).

[0058] In main body display mode, the video cable 30 is removed, and thedetector 14 for detecting whether the video cable has been inserted ornot detects this state. When it does so, it outputs a first signal (eg ahigh-level signal), and the interlocking switches S2 a and S2 b are setin the positions denoted by the unbroken lines. Consequently, the signalobtained from the CCD 4 is fed by way of the A/D converter 6, the thirdprocessing circuit 80 and the D/A converter 22 to the liquid crystaldisplay 26 on the main body of the camera. As will be explained later,the third processing circuit 80 lays emphasis on contrast whileprocessing the image, and so it is able to display the image in such amanner as to be easy to view outdoors on the liquid crystal displaydevice.

[0059] In monitor display mode, the video cable 30 is inserted, and thedetector 14 for detecting whether the video cable has been inserted ornot detects this state. When it does so, it outputs a second signal (ega low-level signal), and the interlocking switches S2 a and S2 b are setin the positions denoted by the broken lines. Consequently, the signalobtained from the CCD 4 is fed by way of the A/D converter 6, the fourthprocessing circuit 82 and the D/A converter 22 to the monitor displaydevice 28. As will be explained later, the fourth processing circuit 82processes the image with good reproduction of tone. This means that ifviewed outdoors the contrast is poorer than in the main body displaymode, but this presents no problem because it is highly unlikely thatimages will be captured outdoors with the video cable inserted.

[0060]FIGS. 7 and 8 are block diagrams illustrating respectively thethird image processing circuit 80 and the fourth image processingcircuit 82. In the drawings, 84 and 88 are constants which are added tothe brightness signal, 86 and 90 are gamma correction circuits, and 92is a shade signal processing circuit. In the third processing circuit80, as the drawing shows, a constant 1 is added in the adder 64, while aconstant 2 is added in the fourth processing circuit 82.

[0061] For the constant 2, a value is chosen which will allow tonereproduction in dark areas to improve. However, in this case even thoseparts where the image is dark come to have a brightness value greaterthan the constant 2, and the brightness ratio between the bright anddark areas decreases. In other words, the contrast decreases, and theimage becomes difficult to see, particularly when viewed on the built-inliquid crystal display device in bright light outdoors.

[0062] For the constant 1, a value smaller than that of the constant 2is chosen. In this manner it is possible to obtain an image with a largeamount of contrast, which is easy to see when viewed outdoors on aliquid crystal screen.

[0063] As may also be seen from FIGS. 7 and 8, the method of gammacorrection processing differs between the third processing circuit 80and the fourth processing circuit 82. Gamma correction processingcircuits comprise look-up tables.

[0064] If the input of the look-up table is x and the output y, alook-up table for gamma correction should normally produce arelationship y=x^(γ). Supposing the relationship between the input andoutput of the look-up tables for gamma correction in FIGS. 4 and 5 isy=x^(γ1) and y=x^(γ2) respectively, constructing a look-up table toyield the relationship γ1>γ2 will allow an image with a greater degreeof contrast to be obtained in the third processing circuit than in thefourth processing circuit.

[0065]FIGS. 9 and 10 are drawings illustrating the input/outputrelationships of the gamma correction circuits 44 and 46 in FIGS. 7 and8 respectively. In the table in FIG. 7, y=x, while in the table in FIG.8, y=x^(0.45). This is an example of where γ1=1, γ2=0.45 as above. Whereγ1=1 is selected as in FIG. 7, there is no particular reason to use alook-up table, and the circuit can be omitted.

[0066] (Embodiment 3)

[0067]FIG. 11 is a block diagram illustrating the third embodiment ofthe digital camera with interchangeable displays to which the presentinvention pertains, and depicts a device for changing the display basedon the results of detecting the position of the focus. In the device towhich the present invention pertains, an image processed in the normalmanner is displayed if the position of the focus is at infinity, whereasan enlarged image is displayed if the position of the focus is not atinfinity.

[0068] In FIG. 11, means for capturing an image is composed of a lens 2and a charged-coupled device (CCD) 4. 6 is an A/D converter, 94 is amemory which temporarily stores the output of the CCD after A/Dconversion, 90 is a fifth image processing circuit whereby signals ofthe normal scaling ratio are processed, 92 is a sixth processing circuitwhereby zoom (enlarged) signal processing is implemented, 96 is a devicefor detecting the position of the focus, 22 is a D/A converter, 24 is amemory which memorises the image which has been captured, 45 is an ANDcircuit, 46 is a NOT circuit, 26 is the display device attached to themain body of the camera, preferably a liquid crystal display device, S1a and S1 b are first interlocking switches which change according to theQ output of the flip-flop 18, S2 a and S2 b are second interlockingswitches which change according to the output of the means 96 ofdetecting the position of the focus and the shutter button 16, S3 is athird switch which changes according to the Q output of the flip-flop18, and S4 is a fourth switch which changes according to whether thevideo cable 30 from the monitor display device 28 is inserted or not,and constitutes the image output terminal.

[0069] When the shutter button 16 is not being depressed, a low-levelsignal is output from the Q output of the flip-flop 18, and the outputof the means 96 of detecting the position of the focus is output withoutany modification from the AND circuit 45. In this case, the switches S1are set in the positions denoted by the unbroken lines.

[0070] The CCD 4 in the present embodiment has, for instance, a colourfilter of the type shown in FIG. 2 on its surface. The number of pixelsis 640 horizontal′ 480 vertical, and a colour signal output of 640horizontal′ 240 vertical is obtained as a result of PDMix mode reading.The colour signal is quantified in the A/D conversion circuit 3 andstored temporarily in the memory 4. The colour signal which is stored inthe memory 4 is processed differently depending on whether in the statewherein the shutter button has not been released (ie while the user isadjusting the angle of the picture and the focus) the focal distance isinfinity or not. The explanation which follows assumes that the shutterbutton has not been released.

[0071]FIG. 12 is a block diagram illustrating the fifth image processingcircuit 90 depicted in FIG. 11. In the drawing, 72 is an LPF, 85 is ahorizontal sub-sampling circuit, 38 and 42 are one pixel delay circuits,40 is a one horizontal period delay circuit, 44 and 48 are subtracters,46 is an adder, 56 is an RGB matrix calculation circuit, and 58 is a YUVmatrix calculation circuit.

[0072] The input colour signal with 640 pixels horizontally and 240vertically has 340 horizontal pixels sample in the horizontal samplingcircuit 85, as a result of which a Y/C output of 340 horizontal′ 240vertical is obtained. The Y/C signal is converted to an analogue signalthe D/A converter 22 and displayed on the built-in display device 26.The output obtained here is an image signal of the whole valid imagearea of the CCD (it has not been subject to zoom processing).

[0073] If the focal distance is not set at infinity, the means 96 ofdetecting the position of the focus outputs, for instance, a high-levelsignal, as a result of which the interlocking switches S1 a and S1 b areset in the positions denoted by the unbroken lines.

[0074]FIG. 13 is a block diagram illustrating the sixth image processingcircuit 92 depicted in FIG. 11. In the drawing, 74 is an image centreread circuit, and 76 is a vertical interpolation circuit.

[0075]FIG. 14 illustrates the area which is read by the image centreread circuit 20. A colour signal of 320 pixels horizontal′ 120 verticalof the part denoted in the drawing by shading is read from the memory,and after Y/C signal processing, vertical interpolation is implementedby lining the same signal up twice or by some other method, as a resultof which a Y/C output of 340 pixels horizontal′ 240 vertical isobtained. The Y/C signal is converted to an analogue signal in the D/Aconversion circuit 8, and displayed on the in-built display device 26.

[0076] The output obtained here is an image signal with the centre partof the valid image area of the CCD enlarged. Since there is nohorizontal sampling in the fifth image processing circuit 90, it ispossible to display a more detailed image than if the output of thefifth image processing circuit 90 were simply enlarged. Consequently, itmakes it easy to adjust the focus manually while viewing the in-builtdisplay device.

[0077] The above is the action when the shutter button has not beenreleased. If the shutter button is released, a high-level signal isoutput from the flip-flop, the switches S1 a and S1 b are set in thepositions denoted by the broken lines, and the image signal processed inthe first image processing circuit is memorised in the memory 41.

[0078] (Embodiment 4)

[0079] In Embodiment 3, an enlarged image is displayed over all thein-built display device while the focus is being adjusted. This suffersfrom the defect that it becomes difficult to adjust the angle of thepicture. FIG. 15 illustrates a fourth embodiment of the presentinvention in which this has been improved. In FIG. 15, 78 is a circuitfor generating horizontal timing, and 79 is a circuit for generatingvertical timing, while 47 and 48 are AND circuits.

[0080] In this embodiment, if the shutter button has not been releasedand the focal distance is not set at infinity, only the high-levelportions of the signals forming the output of the circuit for generatinghorizontal timing 30 and the circuit for generating vertical timing 31are enlarged and displayed.

[0081] FIGS. 16(a) and (b) are examples of output signals from thecircuit for generating horizontal timing 78 and the circuit forgenerating vertical timing 79 respectively, while FIGS. 17(a) and (b)are colour data in the memory, and a conceptual drawing of image signalsdisplayed on the built-in display device respectively.

[0082] In the example illustrated in FIGS. 16 and 17, an image output isobtained in which only the centre part of the screen, amounting to onehalf in both the horizontal and vertical directions, is enlarged andprocessed. This makes it possible to adjust the focus manually whileviewing the centre part of the image, and to adjust the angle whileviewing the peripheral part of the image.

[0083] It remains to point out that in the first embodiment the firstprocessing circuit 10, second processing circuit 12, progressiveprocessing circuit 8 and other circuits may be constituted using amicrocomputer. In this case, signal processing is implemented by theprocessor, so that it is possible to decrease the frequency ofcalculation for signal processing and increase the processing speed thegreater the degree of culling.

[0084] Moreover, the second embodiment was described in such a mannerthat both the constant values and the gamma correction circuit werechanged, but it is possible to change just one of them.

[0085] Furthermore, the first, second, third and fourth embodiments havebeen described in such a manner that the first processing circuit 10,second processing circuit 12, third processing circuit 80, fourthprocessing circuit 82, fifth processing circuit 90, sixth processingcircuit 92 and progressive processing circuit 8 are all constitutedseparately, but it is possible for the first processing circuit 10,second processing circuit 12, third processing circuit 80, fourthprocessing circuit 82, fifth processing circuit 90, sixth processingcircuit 92 and progressive processing circuit 8 to be constituted as onecircuit by changing clock frequencies and providing a switch arrangementwhereby additional circuits can be attached and detached.

[0086] Finally, the first, second, third and fourth embodiments havebeen described in such a manner that the second interlocking switches S2a and S2 b have been changed in accordance with the output from thedetector 14 which detects whether the video cable has been inserted ornot, or from the device 96 for detecting the position of the focus, butthis can be implemented manually or by other means.

What is claimed is:
 1. A digital camera with interchangeable displayshaving a built-in display device and an image output terminal fortransmitting image signals to an external monitor device, comprising:means for capturing an image which outputs pixel signals one afteranother; means for processing the image with variable processing; meansfor changing the method of processing of said means for processing theimage; and means for feeding the output of said means for processing theimage to the image output terminal.
 2. The digital camera withinterchangeable displays according to claim 1, wherein said digitalcamera with interchangeable displays has means of detecting whether thevideo cable has been inserted or not, and changes the method ofprocessing of the means for processing the image on the basis of theoutput of said means for detecting whether the video cable has beeninserted or not.
 3. The digital camera with interchangeable displaysaccording to claim 1, wherein digital camera with interchangeabledisplays has means for detecting the position of the focus, and changesthe method of processing of the means for processing the image inaccordance with the output of said means for detecting the position ofthe focus.
 4. The digital camera with interchangeable displays accordingto claim 1, wherein the method of processing the image is renderedvariable by virtue of the fact that pixels are culled in processing it.5. The digital camera with interchangeable displays according to claim1, wherein changing the method of processing in the means for processingthe image consists in changing a value which is added to the brightnesssignal.
 6. The digital camera with interchangeable displays according toclaim 1, wherein changing the method of processing in the means forprocessing the image consists in changing the method of gamma correctionprocessing.
 7. The digital camera with interchangeable displaysaccording to claim 1, wherein changing the method of processing of themeans for processing the image consists in changing the rate ofmagnification of the electronic zoom processing.
 8. The digital camerawith interchangeable displays according to claim 1, wherein said digitalcamera with interchangeable displays has means for driving capturedimage elements whereby the method of driving the means for capturingimages is altered in accordance with a shutter button, which generates atrigger for the intake of still images, and the output of said shutterbutton, said means for driving captured image elements normally drivinga mixture of pixels, while it changes all pixel read drive when saidshutter button is released.
 9. A digital camera with interchangeabledisplays having a built-in display device and an image output terminalfor transmitting image signals to an external monitor device,comprising: means for capturing an image which output pixel signals oneafter another; first means for processing the image, which culls largenumbers of pixels in processing the image; second means or processingthe image, which culls fewer pixels in processing the image; progressivemeans for processing the image, which does not cull any pixels inprocessing the image; first switching means so that when the video cableis not inserted the first means for processing the image is operated andthe image is displayed on the built-in display device; second switchingmeans so that when the video cable is inserted the second means forprocessing the image is operated and the image is displayed on theexternal monitor device; and third switching means so that when theshutter of the video camera is released the means for capturing theimage changes to all pixel read drive and the progressive means forprocessing the image is operated.
 10. A digital camera withinterchangeable displays having a built-in display device and an imageoutput terminal for transmitting image signals to an external monitordevice, comprising: means for capturing an image which output pixelsignals one after another; third means for processing the image, whichemphasises contrast; fourth means for processing the image, whichemphasises tone; progressive means for processing the image which doesnot cull any pixels in processing the image; first switching means sothat when the video cable is not inserted the third means for processingthe image is operated and the image is displayed on the built-in displaydevice; second switching means so that when the video cable is insertedthe fourth means for processing the image is operated and the image isdisplayed on the external monitor device; and third switching means sothat when the shutter of the video camera is released the means forcapturing the image changes to all pixel read drive and the progressivemeans for processing them image is operated.
 11. The digital camera withinterchangeable displays according to claim 10, wherein said third meansfor processing the image has means for adding whereby the pedestal levelis raised by adding a prescribed constant to the brightness signal. 12.The digital camera with interchangeable displays according to claim 10,wherein said fourth means for processing the image has a gammacorrection circuit.
 13. A digital camera with interchangeable displayshaving a built-in display device, comprising: means for changing theposition of the focus, whereby the position of the focus is changed;means for detecting the position of the focus; means for capturing animage which outputs pixel signals one after another; fifth means forprocessing the image, wherein the rate of magnification of theelectronic zoom is 1; sixth means for processing the image, wherein therate of magnification of the electronic zoom is greater than 1; andmeans of switching whereby the image is displayed on the built-indisplay device by operating the fifth means for processing the image ifthe position of the focus is infinity, and the sixth means forprocessing the image if the position of the focus is not infinity.